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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 49 (Page No. 260)
Virtual memory provides a mechanism for isolating one process from another. What memory management difficulties would be involved in allowing two operating systems to run concurrently? How might these difficulties be addressed?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 48 (Page No. 260)
Can you think of any situations where supporting virtual memory would be a bad idea, and what would be gained by not having to support virtual memory? Explain.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 25 (Page No. 256)
A computer with an $8-KB$ page, a $256-KB$ main memory, and a $64-GB$ virtual address space uses an inverted page table to implement its virtual memory. How big ... length of less than $1?$ Assume that the hash table size is a power of two.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 16 (Page No. 255)
You are given the following data about a virtual memory system:The $TLB$ can hold $1024$ entries and can be accessed in $1$ clock cycle $(1\: nsec).$ A ... only $0.01\%$ lead to a page fault, what is the effective address-translation time?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 12 (Page No. 255)
The amount of disk space that must be available for page storage is related to the maximum number of processes$,\: n,$ the number of bytes in the ... an expression for the worst-case disk-space requirements. How realistic is this amount?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 9 (Page No. 255)
What kind of hardware support is needed for a paged virtual memory to work?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 8 (Page No. 254)
The Intel $8086$ processor did not have an MMU or support virtual memory. Nevertheless, some companies sold systems that contained an unmodified $8086$ CPU and did ... they did it. (Hint: Think about the logical location of the MMU.)
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 7 (Page No. 254)
Using the page table of Fig. $3-9,$ give the physical address corresponding to each of the following virtual addresses:$20$4100$8300$
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 6 (Page No. 254)
For each of the following decimal virtual addresses, compute the virtual page number and offset for a $4-KB$ page and for an $8 KB$ page$:20000, 32768, 60000.$
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 5 (Page No. 254)
What is the difference between a physical address and a virtual address?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 1 Question 15 (Page No. 82)
Consider a computer system that has cache memory, main memory (RAM) and disk, and an operating system that uses virtual memory. It takes $1$ nsec to access a word from ... a cache miss) is $99\%$, what is the average time to access a word?
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Self Doubt on Page Fault
To calculate EMAT in case of page fault we used:EMAT= page fault rate*(page fault service time) + (1-page fault rate)*(memory access time) ... time. Then why not we consider address translation time in questions involving only pagefault?
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UGC NET CSE | June 2019 | Part 2 | Question: 47
The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined bypage sizephysical size of memorythe instruction set architecturenumber of processes in memory
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Stallings Book Doubt-Process
Which part of the process image forms the logical address space that is used in paging?
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Galvin Edition 9 Exercise 9 Question 37 (Page No. 456)
The slab-allocation algorithm uses a separate cache for each different object type. Assuming there is one cache per object type, explain why this scheme doesn ... with multiple CPUs. What could be done to address this scalability issue?
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Galvin Edition 9 Exercise 9 Question 34 (Page No. 455)
Consider the parameter$\triangle$ used to define the working-set window in the working-set model. When $\triangle$ is set to a small value, what is the effect on the ... ? What is the effect when $\triangle$ is set to a very high value ?
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Galvin Edition 9 Exercise 9 Question 33 (Page No. 455)
Is it possible for a process to have two working sets, one representing data and another representing code ? Explain.
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Galvin Edition 9 Exercise 9 Question 32 (Page No. 455)
What is the cause of thrashing ? How does the system detect thrashing ? Once it detects thrashing, what can the system do to eliminate this problem ?
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Galvin Edition 9 Exercise 9 Question 31 (Page No. 455)
Consider a demand-paging system with a paging disk that has an average access and transfer time of $20$ milliseconds. Addresses are translated through a page ... of the total) cause page faults. What is the effective memory access time?
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Galvin Edition 9 Exercise 9 Question 30 (Page No. 455)
A page-replacement algorithm should minimize the number of page faults. We can achieve this minimization by distributing heavily used pages evenly over all of memory, ... strategy for the reference string in part $b$ with four page frames?
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Galvin Edition 9 Exercise 9 Question 29 (Page No. 455)
Suppose that your replacement policy (in a paged system) is to examine each page regularly and to discard that page if it has not been used since the ... would you lose by using this policy rather than LRU or second-chance replacement ?
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Galvin Edition 9 Exercise 9 Question 28 (Page No. 455)
Suppose that a machine provides instructions that can access memory locations using the one-level indirect addressing scheme. What sequence of page faults is ... frame allocation technique and only two pages are allocated to this process ?
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Galvin Edition 9 Exercise 9 Question 27 (Page No. 455)
Consider a demand-paging system with the following time-measured utilizations: $CPU$ ... hard disks.$g$. Add prepaging to the page-fetch algorithms.$h$. Increase the page size.
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Galvin Edition 9 Exercise 9 Question 26 (Page No. 455)
The VAX/VMS system uses a FIFO replacement algorithm for resident pages and a free-frame pool of recently used pages. Assume that the free-frame pool is managed ... degenerate to if the number of pages in the free-frame pool is zero?
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Galvin Edition 9 Exercise 9 Question 25 (Page No. 454)
Discuss situations in which the most frequently used ($MFU$) page replacement algorithm generates fewer page faults than the least recently used ($LRU$) page-replacement algorithm. Also discuss under what circumstances the opposite holds.
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Galvin Edition 9 Exercise 9 Question 24 (Page No. 454)
Discuss situations in which the least frequently used ($LFU$) page replacement algorithm generates fewer page faults than the least recently used ($LRU$) page-replacement algorithm. Also discuss under what circumstances the opposite holds.
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Galvin Edition 9 Exercise 9 Question 23 (Page No. 454)
Assume that you are monitoring the rate at which the pointer in the clock algorithm moves. (The pointer indicates the candidate page for replacement.) What can you say ... behavior:$a$. Pointer is moving fast.$b$. Pointer is moving slow.
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Galvin Edition 9 Exercise 9 Question 21 (Page No. 453)
Consider the following page reference string:$7, 2, 3, 1, 2, 5, 3, 4, 6, 7, 7, 1, 0, 5, 4, 6, 2, 3, 0 , 1.$Assuming demand ... following replacement algorithms ?$ $ $LRU$ $replacement$ $ $FIFO$ $replacement$ $ $Optimal$ $replacement$
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Galvin Edition 9 Exercise 9 Question 20 (Page No. 453)
When a page fault occurs, the process requesting the page must block while waiting for the page to be brought from disk into physical memory. Assume that there ... also have to wait for the faulting page to be brought into memory? Explain.
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Galvin Edition 9 Exercise 9 Question 19 (Page No. 453)
Assume that we have a demand-paged memory. The page table is held in registers. It takes $8$ milliseconds to service a page fault if an empty frame is ... page-fault rate for an effective access time of no more than $200$ nanoseconds ?
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