Recent questions tagged virtual-memory

694
views
1 answers
0 votes
TRUE/FALSE:statement 1: secondary index may or may not be dense.statement 2: disk is considered as the maximum size of virtual memory.
946
views
1 answers
0 votes
What is the reason for Belady’s Anomaly,I am aware that it is not a stack based algorithm and for a certain set of pages it shows this anomaly where the increase in page frame increases the page fault rate.
1.4k
views
1 answers
4 votes
Assume a program has just referenced an address in virtual memory. Which of the following scenario cannot occur?TLB miss with no page faultTLB hit and page replacementTLB miss and page faultTLB hit with no page fault
1.5k
views
2 answers
2 votes
A computer system consists of infinitely large primary memory storage capacity. In other words the physical address space exceeds the logical address ... memory concept can be used to give multiprogramming capability to system
2.7k
views
1 answers
8 votes
Consider a system with paging-based memory management, whose architecture allows for a $4\text{GB}$ virtual address space for processes. The size of logical pages and physical frames is ... text{GB} + 4 \text{KB}$4 \text{MB} + 4 \text{GB}$
3.5k
views
2 answers
0 votes
Decreasing the RAM causesfewer page faultsmore page faultsvirtual memory gets increasedvirtual memory gets decreased
1.4k
views
1 answers
0 votes
Why the formula used here is not P(10) + (1-P)(50) = 20 ?;A computer keeps its page tables in memory. The time required to read a word from the pagetable is 50ns. ... =4/5 = .80The TLB hit rate has to be 80% for a mean access time of 20ns.
1.2k
views
3 answers
0 votes
A computer system has a page size of 1024 bytes and maintains page table for each process in the main memory.The overhead required for doing a lookup in ... -rate is required to ensure an average virtual address translation time of $200ns$?
666
views
0 answers
0 votes
A computer system has TLB access time = 30 ns and the main memory access time is 150 ns and if the miss rate is 20 % the calculate the effective memory access time if 3 level of paging is applied. i am getting 270 ns
1.0k
views
0 answers
0 votes
A processor uses 36 bit physical address and 32 bit virtual addresses, with a page frame size of 4 Kbytes. Each page table entry is of size 4 ... level page tables are respectively.modified from : https://gateoverflow.in/490/gate2008-67
1.9k
views
2 answers
1 votes
Consider the machine with 64 MB Physical Memory and a 34 bit Virtual Address Space. If the page size is 4KB, the appropriate sizes of conventional and inverted page table sizes ... 16Kd)16K, 4M.soln: is Option C. but my ans is (7MB, 28KB)
850
views
1 answers
1 votes
149
views
0 answers
0 votes
When the process is in memory and executing with PC value = 100Let virtual memory concept is used when next process is scheduled and main memory doesn't have space ... stores its PCB also in Secondary storage ?? and restore later to MM ??
409
views
0 answers
0 votes
What exactly is happening here? I can't figure out the arrows!
1.9k
views
1 answers
0 votes
A simplified view of thread states is Ready, Running, andBlocked, where a thread is either ready andwaiting to be scheduled, is running on the processor, or is blocked ... . However, I am highly confused over answers to part b, and part c.
486
views
0 answers
0 votes
An operating system supports a paged virtual memory, using a central processor with a cycle time of 1 microsecond. It costs an additional 1 microsecond to ... over such questions. Please tell me how to solve these questions correctly?
2.3k
views
3 answers
2 votes
Consider a system with a two level paging scheme in which a regular memory access takes 150 ns, and servicing a page fault takes 8 ms. An average instruction ... average instruction execution time?a) 645 nsb) 1050 nsc) 1215 nsd) 1230 ns
431
views
0 answers
0 votes
First level data cache: Direct mapping , writeThrough/write allocate , 8kb data and lines of 8 bytes, miss rate= 17%First level instructions cache: Direct mapping ... number of accesses?5)What is the average memory access time?Thanks !!
636
views
0 answers
1 votes
How we can improve size of virtual memory?
1.3k
views
2 answers
1 votes
A computer uses 30 bit physical address, 38 bit virtual address and uses 2-level paging. The page table base register stores the base address of the first level, Each ... is of size 32 bits. The size of page in KB in computer is ________.
472
views
0 answers
0 votes
1.8k
views
2 answers
1 votes
Which of the following is true?A. If the page size increases page fault rate may also increase.B. Multi-level paging optimizes program execution time ... increases program execution time.Correct OptionD. TLB is a software data structure.
2.0k
views
1 answers
0 votes
Virtual memory increases degree of multiprogrammingVirtual memory decreases degree of multiprogrammingDegree of multiprogrammoing means number of process is in memory. (and ... to prediction it is wrong. Where Am I getting wrong?
614
views
1 answers
0 votes
821
views
1 answers
0 votes
509
views
1 answers
1 votes
Assume that a memory with only 4 pages,each of 16 bytes,is initially empty.The CPU generates the following sequence of virtual addresses and uses the LRU page replacement policy.0,4,8,20,24,36,44 ... 1,2,4,5 . D)9 and 1,2,3,5
1.3k
views
1 answers
2 votes
The number of page faults with a given string "S " using LRU algorithm is "N" and considering the reverse of string S^R the number of page faults will beA)N. B)N/2C)2N. D)3.75N