Register

Recent questions tagged virtual-memory

19.9k
views
9 answers
47 votes
GATE CSE 1998 | Question: 2.18, UGCNET-June2012-III: 48
If an instruction takes $i$ microseconds and a page fault takes an additional $j$ microseconds, the effective instruction time if on the average a page fault occurs every $k$ instruction is ... $({i+j})\times {k}$
User Avatar
26.5k
views
4 answers
46 votes
GATE CSE 1999 | Question: 19
A certain computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain ... information for the page? Assume that the page size is $512$ bytes.
User Avatar
14.4k
views
4 answers
41 votes
GATE CSE 1999 | Question: 2.11
Which of the following is/are advantage(s) of virtual memory?Faster access to memory on an average.Processes can be given protected address spaces.Linker can ... in physical memory.Program larger than the physical memory size can be run.
User Avatar
13.1k
views
3 answers
36 votes
GATE CSE 1999 | Question: 2.10
A multi-user, multi-processing operating system cannot be implemented on hardware that does not supportAddress translationDMA for disk transferAt least two modes of CPU execution (privileged and non-privileged)Demand paging
User Avatar
7.2k
views
2 answers
19 votes
GATE CSE 1999 | Question: 1.9
Listed below are some operating system abstractions (in the left column) and the hardware components (in the right column) ... 4 (D) - 1(A) - 4 (B) - 1 (C) - 2 (D) - 3
User Avatar
15.0k
views
4 answers
35 votes
GATE CSE 2009 | Question: 34
A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address becauseIt reduces the memory ... helps to reduce the number of page faults in page replacement algorithms.
User Avatar
12.2k
views
2 answers
32 votes
GATE CSE 2009 | Question: 10
The essential content(s) in each entry of a page table is / areVirtual page numberPage frame numberBoth virtual page number and page frame numberAccess right information
User Avatar
24.4k
views
9 answers
66 votes
GATE CSE 2004 | Question: 21, ISRO2007-44
The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined bythe instruction set architecturepage sizenumber of processes in memoryphysical memory size
User Avatar
15.9k
views
6 answers
27 votes
GATE CSE 2003 | Question: 26
In a system with $\text{32 bit}$ virtual addresses and $\text{1 KB}$ page size, use of one-level page tables for virtual to ... large memory overhead in maintaining page tablesthe large computation overhead in the translation process
User Avatar
15.4k
views
3 answers
37 votes
GATE CSE 2002 | Question: 19
A computer uses $32-bit$ virtual address, and $32-bit$ physical address. The physical memory is byte addressable, and the page size is $4$ ... many bits are available for storing protection and other information in each page table entry?
User Avatar
52.2k
views
15 answers
122 votes
GATE CSE 2003 | Question: 78
A processor uses $2-level$ page tables for virtual to physical address translation. Page tables for both levels are stored in the main memory. Virtual and physical addresses are both $32$ ... the nearest $0.5$ ns)$1.5$ ns$2$ ns$3$ ns$4$ ns
User Avatar
5.4k
views
2 answers
1 votes
Page tables are stored in memory , which has access time of 100 ns.
Page tables are stored in memory , which has access time of 100 ns. The TLB holding 8 page table entries, has an access time of 10 ns. Using execution of process , ... requires one memory access.A) 38120 ns B) 40000 ns C) 40120 ns D) None
User Avatar
68.6k
views
4 answers
49 votes
GATE CSE 2001 | Question: 2.21
Consider a machine with $64$ MB physical memory and a $32$-bit virtual address space. If the page size s $4$ KB, what is the approximate size of the page table?$\text{16 MB}$\text{8 MB}$\text{2 MB}$\text{24 MB}$
User Avatar
13.1k
views
3 answers
37 votes
GATE CSE 2001 | Question: 1.20
Where does the swap space reside?RAMDiskROMOn-chip cache
User Avatar
22.2k
views
2 answers
47 votes
GATE CSE 2001 | Question: 1.8
Which of the following statements is false?Virtual memory implements the translation of a program's address space into physical memory address ... increases the degree of multiprogrammingVirtual memory reduces the context switching overhead
User Avatar
18.9k
views
5 answers
35 votes
GATE CSE 2000 | Question: 2.22
Suppose the time to service a page fault is on the average $10$ milliseconds, while a memory access takes $1$ microsecond. Then a $99.99\%$ hit ... access time of$1.9999$ milliseconds$1$ millisecond$9.999$ microseconds$1.9999$ microseconds
User Avatar
11.2k
views
4 answers
43 votes
GATE CSE 1991 | Question: 03-xi
Indicate all the false statements from the statements given below:The amount of virtual memory available is limited by the availability of the secondary ... fit techniques for memory allocation ensures that memory will never be fragmented.
User Avatar
12.9k
views
4 answers
36 votes
GATE CSE 1991 | Question: 03,iii
The total size of address space in a virtual memory system is limited by:the length of MARthe available secondary storagethe available main memoryall of the abovenone of the above
User Avatar
78.5k
views
14 answers
280 votes
GATE CSE 2008 | Question: 67
A processor uses $36$ bit physical address and $32$ bit virtual addresses, with a page frame size of $4$ Kbytes. Each page table entry is of size $4$ bytes. A three level page ... {20,20,20}$\text{24,24,24}$\text{24,24,20}$\text{25,25,24}$
User Avatar
19.9k
views
7 answers
51 votes
GATE CSE 2008 | Question: 38
In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is:before effective ... calculationafter effective address calculation has completedafter data cache lookup has completed
User Avatar
38.6k
views
7 answers
107 votes
GATE CSE 2013 | Question: 52
A computer uses $46\text{-bit}$ virtual address, $32\text{-bit}$ physical address, and a three-level paged page table organization. The page table base register stores the ... $ in this computer?$2$4$8$16$
User Avatar
65.6k
views
19 answers
130 votes
GATE CSE 2004 | Question: 47
Consider a system with a two-level paging scheme in which a regular memory access takes $150$ $nanoseconds$, and servicing a page fault takes $8$ ... 645 nanoseconds}$\text{1050 nanoseconds}$\text{1215 nanoseconds}$\text{1230 nanoseconds}$
User Avatar
Page: