Self Doubt on Page Fault

Question

To calculate EMAT in case of page fault we used:

EMAT= page fault rate*(page fault service time)  + (1-page fault rate)*(memory access time)

My doubt is:

In case of NO PAGE FAULT, why we considered only one memory access time .

Why not two memory accesses, one for page table + one for accessing actual byte. ?

That is:

Why not this formula:

EMAT= page fault rate*(page fault service time)  + (1-page fault rate)* (2 * memory access time)

@arjun sir 

https://gateoverflow.in/318/gate2004-47

Here, in TLB + Page Fault type question,

You considered (VA -> PA time) + memory access time.

 

Then why not we consider address translation time in questions involving only pagefault?

 

Comments

In reality logical memory translation requires a number of steps. However, what those steps are depends upon the state of the processor, something that is unpredictable. These steps take place transparently behind the scenes and you do not even need to grasp all of them to understand operating systems.

What you need to know in the real world is that the CPU translates logical addresses to physical addresses. If the CPU is unable to make that translation, it triggers a page fault.

So, its just for the sake of simplification. There is a hell lot of detail to it. You need to accept and go forward.

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@`JEET Thanks for ur comment!

Answer 1

This GATE question is similar to your doubt :

https://gateoverflow.in/669/gate2000-2-22

Now, see when only the page fault rate given in the question then we consider that the TLB hit ratio is 100% and we will assume that TLB access time is negligible.

This is Arjun sir Comment on the same question: https://gateoverflow.in/669/gate2000-2-22?show=5230#c5230

Now, this thing arise a question: Is TLB hit lead to the page fault? that answer also you will get in the same comment of Arjun sir.

Comments

@Aditya Patel yes,This is really helpful.

Thanks for sharing references as well.