Register

Recent questions tagged effective-memory-access

1.0k
views
2 answers
0 votes
Memory Heirarchy Doubt
Consider a single level cache with an access time of 2.5ns with a block size of 64 bytes. Main Memory uses a block transfer capability that has a ... accessing method in Solving these types of questions? By Default which way is followed?
User Avatar
846
views
1 answers
0 votes
Madeeasy Test Series [Effective memory access time]
My approach: Given EMAT = 44 = (1-p)(m) + p(page fault service + m) . p = page fault ratePage fault service = (0.6) * 10 + (0.4)* (3) ==> 7.24 ... = (1-p)(1) + p(7.2)In page fault also we should consider Memory access time right ..??
User Avatar
648
views
0 answers
0 votes
Self Doubt [Effective memory access time]
Page fault rate = pMain memory access time = mPage fault service time = PSEMAT = (1-p) (m) + (p) (PS + m)OREMAT = (1-p) (m) + (p) (PS)which one ... should we consider [ Page fault service time + MM ] OR [ Page fault service time only ]
User Avatar
283
views
0 answers
0 votes
General doubt.
I am unable to understand the memory access time for hierarchical and simultaneous access using write back policy even after reading from go sources. Can someone plz explain?
User Avatar
595
views
0 answers
0 votes
conceptual doubt
in case of hierarchical memory organization when there is a miss in cache , we need to bring the entire block from main memory to cache so in the ... memory.also please tell me what should be T2 in case of simultaneous organization?
User Avatar
474
views
0 answers
0 votes
GATE analysis
An Intel processor uses a cache block size of 128 bytes and a memory transfer to cache is about 10 times the access time of cache memory. with cache hit ... that of access time of memoryA. 20 percentB. 30 percentC. 40 percentD. 50 percent
User Avatar
932
views
0 answers
0 votes
OS EMAT vs AMAT
In Page Fault and Demand Paging concept what is the difference between Effective Memory access time and average memory access time?The formulae are known but i am confused with the concept.
User Avatar
607
views
2 answers
0 votes
Memory Access-self doubt
what is the number of memory accessed required inregister indirect modeindex register modebase register modepls explain in details with examples
User Avatar
1.0k
views
1 answers
1 votes
miss penalty
Effective address time for a cache comprising of L1 and L2 cache =9nshit ratio of L1 cache = 0.8 hit ratio of L2 cache = 0.9memory access time =100nsMiss penalty of L1 ... x+y; what's z??I am getting 20.33 but the given answer is different!
User Avatar
584
views
1 answers
0 votes
Local Coaching
A cache is having 60% hit ratio. Cache access time is 30 ns and main memory access time is 100 ns. What is the average access time for reading?My doubt is whether to assume cache ... +100). If assumed to be direct, ans = 0.6(30) + 0.4(100).
User Avatar
898
views
2 answers
1 votes
COA: Cache Accesss Time
Little confusion with these questions.What will be o/p for these two questions one with Write back and the other is Write through.1.)A 128 word ... ( write-allocate and no write-allocate)followed for Hierarchal and Simultaneous access ?
User Avatar
1.7k
views
1 answers
0 votes
Galvin #page fault service time #memory management #disk access
User Avatar
390
views
0 answers
1 votes
MadeEasy Test Series: Operating System - Effective Memory Access
here when we calculate time if the write operation has to be performed thenaccording to me we have to calculate it in following way-EMAT =0.8*(0.9*(100)+0 ... cache time,is there anything wrong in my approach if it is the please correct me
User Avatar
238
views
1 answers
0 votes
When to use word access time and when to use block access time in access time calculation.
Hello, I came across this question when practicing from a gate app. My question is here simultaneous access is used and hence we are ... Added the image of question. Thankshttps://gateoverflow.in/?qa=blob&qa_blobid=13957411914537045045
User Avatar
382
views
1 answers
0 votes
Page Fault Doubt
https://gateoverflow.in/2122/gate2011-20-ugcnet-june2013-ii-48in the solution why memory access is not considered along with page fault service time when a page ... fault the page has to be brought into the memory which needs memory access
User Avatar
1.7k
views
1 answers
0 votes
EMAT in case of page fault
I have read that EMAT when the page fault occurs is =p(PS+MA)+(1-p)(MA)p is the probability of page faulti-p is the probability that page is present in Main MemoryPS is the ... should be equals=p(MA+PS+MA)+(1-p)(MA+MA).why it is not so??
User Avatar
310
views
0 answers
0 votes
Access Time Doubt
#OSAfter going through some previous year questions on.. I found that in gate we have to use simultaneous access of memory instead of hierarchical access But i have ... 64ns as option is not matching so we have taken as 65nsIs it correct??
User Avatar
2.3k
views
2 answers
2 votes
Cache Memory
Consider the following statements:S1 : Doubling the line size halves the number of tags in the cache.S2 : Doubling the associativity doubles the number ... size usually reduce compulsory misses.Which of the above statements is always true?
User Avatar
3.1k
views
0 answers
2 votes
Effective Access Time
Consider a two level memory hierarchy L1 (cache) has an accessing time of 10 nsec and main memory has accessing time 100 nsec. Assume the hit ratio read ... if it uses write through technique ________. (Upto 1 decimal places)Ans. 67.6
User Avatar
1.4k
views
1 answers
0 votes
Cache Memory
Suppose after analyzing a new cache design, you discover that the cache has too many conflict misses and this needs to be resolved. You know that you ... Slower cache access timeB. Increase index bitsC. Increase block sizeD. All of these
User Avatar
1.2k
views
1 answers
1 votes
Effective Access Time
User Avatar
293
views
0 answers
0 votes
Cache Memory
Hi sir, i want to ask that how we'll come to know whether this is an independent memory organization or it is a hierarchical organization ? In case of hierarchical it's answer would've been 1.23T1In case of independent it's answer is 1.11T1
User Avatar
2.8k
views
1 answers
2 votes
My doubt on TLB and page fault
First read this whole thing what I am writing below:Case 1: If we have to access unit address in memory using TLB and we assume that no page ... EMAT here affects the first Estimated memory access time which we have calculated using TLB?
User Avatar
506
views
1 answers
0 votes
Cache Organization
Ques. In a two-level memory hierarchy, let $t_1 = 10^{-7s}$ and $t_2 = 10^{-2s}$. If ta denotes the average accesstime of the memory hierarchy, and if we ... instead of Hit Ratio and Hit time....and plz explain which one to use and when...
User Avatar
392
views
1 answers
1 votes
Cache Organization
My Doubt is simple How to know which cache organization to use hierarchical or direct cache while calculating the averageaccess time.Like in this Question:- https:// ... /2308/gate1993-11 Here hierarchal access is used and why? Plz help me
User Avatar
538
views
0 answers
0 votes
TLB-Memory-access-live-test-2
A system uses $2$ level paging scheme.A regular memory access takes $100$ ns and servicing a page fault takes $10$ millisecond.An avg instruction takes $100$ ... execution time.$?$Options given are $1300$ns$1150$ns$2320$ns$1275$ns
User Avatar
Page: