NIELIT 2017 July Scientist B (CS) - Section B: 32

Question

A CPU generates $32$-bit virtual addresses. The page size is $4$ KB. The processor has a Translation Look-aside Buffer (TLB) which can hold a total of $128$ page table entries and is $4$-way set associative. The minimum size of the TLB tag is

• A. $\text{11 bits}$
• B. $\text{13 bits}$
• C. $\text{15 bits}$
• D. $\text{20 bits}$

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https://gateoverflow.in/1840/gate2006-62-isro2016-50

Answer 1

Virtual Address = 32 bits

Offset bits (d) = 12 bits (As page size = 4 KB)

Bits for page number (p) = 32 - 12 = 20 bits

p = 20	d = 12

'p' bits will be used to index the TLB entry as

For set-associative mapping the division of virtual address is as follows :

tag	set	offset

Offset here represents the page offset, d = 12 bits

Therefore tag + set = 20

Number of sets = 128/4 = 32

Therefore, set = 5

Hence, tag = 20 - 5 = 15 

Option (C)

Answer 2

Page size = 4KB, hence offset bits required is 12.

Bits remaining for TLB tag and set = 32-12 = 20.

Bits required for 4 way set associative = 128/4 = 32 = 2^5 = 5 bits.

therefore, minimum bit of TLB Tag = 20-5 = 15.