GATE CSE 2024 | Set 1 | Question: 20

Question

Consider a $5$-stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the following statements about forwarding is/are CORRECT?

• A. In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction
• B. In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction
• C. Forwarding cannot prevent all pipeline stalls
• D. Forwarding does not require any extra hardware to retrieve the data from the pipeline stages 

Answer 1

Answer: Option C. 

Each Option is discussed in THIS lecture on "Forwarding in pipeline".  

Option A: False.

Correct statement is: In a pipelined execution, forwarding means the result from a destination stage of an earlier instruction is passed on to the source stage of a later instruction. See HERE.

Option B: False, because of "next instruction". 

1. In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction. FALSE.

2. In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of a later instruction. TRUE.

3. In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction, after a stall. TRUE. 

In the graphical representation of events (timing diagram that we draw for execution), forwarding paths are valid only if the destination stage is later in time than the source stage. For example, there cannot be a valid forwarding path from the output of the memory access stage in the first instruction to the input of the execution stage of the following, since that would mean going backward in time (tine travel). 

Option B is False & Option C is True. Explained HERE. 

Option D: False. We need to create forwarding datapaths. Explained HERE. 

Image Source: COA book by Patterson.

Comments

In option B, it is given as CAN be passed on... , So forwarding to a later instruction and forwarding to next instruction after a stall, both will be included in the option right?

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@Deepak Poonia Can you link reference for what you said for options A and B? (PS Not your YT video)

I still believe option A is correct .

Forwarding is the concept of making data available as input for subsequent instructions, even though the generating instruction hasn’t gotten to WB in order to write the memory or registers.

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Since in Option B, it is written CAN BE and Without Stall is NOT mentioned, therefore @Deepak Poonia option B is correct 

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But the point is operand forwarding is implemented to prevent stalls. So, 'without stalls' should be implicit in the statement.

Anyway, the question seems ambiguous and should be challenged after answer key is released.

Answer 2

A C

A. True , bcoz a situation like forwarding to a earlier stage of next instruction will be a  (RAW) data hazards and Pipeline forwarding or bypassing  is technique to avoid stall due to RAW hazards."The forwarding unit detects hazards by comparing the destination registers to the source registers of the current instruction."
So the destination of the forwarding can never be a  earlier stage of next instruction.So such a case will never even arise.
In forwarding the destination is already decided wrt to the source stage and will never be a  earlier stage of next instruction.
ie "earlier stage of next instruction" is not even a possible candidate for destination (otherwise it will be a data hazard)
So A is correct. 

B. False bcoz EX of the next instruction will be overlapping with the MEM of current instruction . So the output of MEM of current can't be given as input to EX of next. 
If you consider split phase ie "writing at rising edge and reading at falling edge" ,this concept has nothing to do with Operand forwarding, it nowhere relates to the concept of operand forwarding.
This was said by Sachin Mittal in a comment. 
https://gateoverflow.in/1391/gate-cse-2005-question-68?show=95597#c95597

This is by ARJUN sir : https://gateoverflow.in/1391/gate-cse-2005-question-68?show=95621#c95621

C. True

D. False... MUX  a special "forwarding" circuit is implemented using the buffers and MUX

Have a read 
https://web.archive.org/web/20131227033204/http://hpc.serc.iisc.ernet.in/~govind/hpc/L10-Pipeline.txt
https://www.cs.uaf.edu/2011/fall/cs441/lecture/09_20_pipelining.html
https://courses.cs.washington.edu/courses/cse378/07au/lectures/L12-Forwarding.ppt

Comments

coachings are saying A,B,C I also can't understand the logic behind option A

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edited!

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anyone challenging the question for option A?