315 views

1 Answer

Best answer
2 votes
2 votes

In this question, they have mentioned about the cache miss time and cache hit time directly and they are not saying “cache access time/ memory access time”, so we use the below formula:

 

Average Access Time = Hit Rate×Hit Time + Miss Rate×Miss Time

                                  = 0.8(5) + 0.2(50)

                                  = 14ns

selected by

Related questions

651
views
1 answers
2 votes
LRU asked Dec 4, 2021
651 views
Consider a two-level memory hierarchy with separate instruction and data caches in level 1, and main memory in level 2. The clock cycle time in 1 ns. The ... cycle. The average access time of the memory hierarchy will be . nanoseconds
250
views
0 answers
1 votes
lalitver10 asked Jan 12, 2023
250 views
Question : i. CISC architecture a. Symmetric registersii. RISC architecture b. Multiple memory referencesiii. Misalignment c. Condition code registeriv. Static ... ,iii-b,iv-di-c,ii-a,iii-b,iv-bi-c,ii-a,iii-d,iv-b
394
views
0 answers
0 votes
rsansiya111 asked Dec 8, 2021
394 views
Consider the following code :Load R1,MLoad R2,NCMP R1,R2JGE ENDStore [300],R2END: Store [300],R1 Assume that M=30 and N=25. The above ... . Determine the number of clock cycles required for completion of execution of all instructions.
1.2k
views
1 answers
3 votes
LRU asked Dec 4, 2021
1,228 views
Consider a direct-mapped cache with 64 blocks and a block size of 16 bytes. Byte address 1200 will map to block number ………… of the cache.